Microelectronic device features continue to decrease in size, pushing the limits of photolithography and therefore requiring increasingly expensive multi-patterning techniques to achieve production of next generation devices. An alternative bottom-up approach to higher resolution patterning uses self-assembly of block co-polymers to increase the frequency of a pre-pattern image created with traditional photolithography. We have developed silicon containing block co-polymers as high-chi (χ) materials that allow production of smaller features. This work focuses on a block co-polymer of poly(4-pentamethyldisilyl styrene)-b-poly(2-vinylpyridine) (PDSS-P2VP) that was produced by anionic polymerization. This polymer has excellent etching selectivity under both oxidative and reductive reaction ion-etching conditions.1,2 The χ value for PDSS-P2VP was estimated by measuring the order-disorder transition temperature of the polymer and found to be significantly higher than a block co-polymer that can create 10 nm patterns. Neutral top and bottom surfaces were identified by the island and hole technique previously reported, and the block co-polymer was thermally annealed between these layers.3 Different processing conditions, such as O2 plasma etch time, were adjusted to demonstrate production of oriented 10nm lamellae.
1 Bates C. M., et al. Science (2012), 338(6108), 775.
2 Azarnouchea, L., et al. J. Vac. Sci. Technol. B (2016) 34 (6), 061602/1-061602/10.
3 Maher, M. J., et al. Chemistry of Materials (2014), 26(3), 1471-1479.
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